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esp32h2.rs (2149B)

      1 use crate::mmu_hal::{MMU_PAGE_8KB, MMU_PAGE_16KB, MMU_PAGE_32KB, MMU_PAGE_64KB};
      2 
      3 const SOC_MMU_ENTRY_NUM: u32 = 256;
      4 const SOC_MMU_VALID_VAL_MASK: u32 = 0x1ff;
      5 const SOC_MMU_VALID: u32 = 1 << 9;
      6 
      7 fn soc_mmu_vaddr_mask(mmu_id: u32) -> u32 {
      8     mmu_ll_get_page_size(mmu_id) * SOC_MMU_ENTRY_NUM - 1
      9 }
     10 
     11 pub fn mmu_ll_get_page_size(_mmu_id: u32) -> u32 {
     12     let spi_mem = unsafe { &*esp32h2::SPI0::ptr() };
     13     let page_size_code = spi_mem.mmu_power_ctrl().read().spi_mmu_page_size().bits();
     14 
     15     match page_size_code {
     16         0 => MMU_PAGE_64KB,
     17         1 => MMU_PAGE_32KB,
     18         2 => MMU_PAGE_16KB,
     19         _ => MMU_PAGE_8KB,
     20     }
     21 }
     22 
     23 pub fn mmu_ll_get_entry_id(mmu_id: u32, vaddr: u32) -> u32 {
     24     let shift_code = match mmu_ll_get_page_size(mmu_id) {
     25         MMU_PAGE_64KB => 16,
     26         MMU_PAGE_32KB => 15,
     27         MMU_PAGE_16KB => 14,
     28         MMU_PAGE_8KB => 13,
     29         _ => {
     30             error!("mmu_ll_get_entry_id failed!");
     31 
     32             0
     33         }
     34     };
     35 
     36     (vaddr & soc_mmu_vaddr_mask(mmu_id)) >> shift_code
     37 }
     38 
     39 pub fn mmu_ll_entry_id_to_paddr_base(mmu_id: u32, entry_id: u32) -> u32 {
     40     let shift_code = match mmu_ll_get_page_size(mmu_id) {
     41         MMU_PAGE_64KB => 16,
     42         MMU_PAGE_32KB => 15,
     43         MMU_PAGE_16KB => 14,
     44         MMU_PAGE_8KB => 13,
     45         _ => {
     46             error!("mmu_ll_entry_id_to_paddr_base failed!");
     47 
     48             0
     49         }
     50     };
     51 
     52     let spi_mem = unsafe { &*esp32h2::SPI0::ptr() };
     53     spi_mem
     54         .mmu_item_index()
     55         .write(|w| unsafe { w.spi_mmu_item_index().bits(entry_id) });
     56 
     57     let mmu_item_content = spi_mem
     58         .mmu_item_content()
     59         .read()
     60         .spi_mmu_item_content()
     61         .bits();
     62 
     63     (mmu_item_content & SOC_MMU_VALID_VAL_MASK) << shift_code
     64 }
     65 
     66 pub fn mmu_ll_check_entry_valid(_mmu_id: u32, entry_id: u32) -> bool {
     67     let spi_mem = unsafe { &*esp32h2::SPI0::ptr() };
     68     spi_mem
     69         .mmu_item_index()
     70         .write(|w| unsafe { w.spi_mmu_item_index().bits(entry_id) });
     71 
     72     let mmu_item_content = spi_mem
     73         .mmu_item_content()
     74         .read()
     75         .spi_mmu_item_content()
     76         .bits();
     77 
     78     (mmu_item_content & SOC_MMU_VALID) != 0
     79 }