esp32s2.rs (2282B)
1 const SOC_MMU_VADDR_MASK: u32 = 0x3FFFFF; 2 const DR_REG_MMU_TABLE: u32 = 0x61801000; 3 const SOC_MMU_VALID_VAL_MASK: u32 = 0x3fff; 4 const SOC_MMU_INVALID: u32 = 1 << 14; 5 const SOC_IRAM0_CACHE_ADDRESS_LOW: u32 = 0x40080000; 6 const SOC_IRAM0_CACHE_ADDRESS_HIGH: u32 = 0x40400000; 7 const SOC_IRAM1_ADDRESS_LOW: u32 = 0x40400000; 8 const SOC_IRAM1_ADDRESS_HIGH: u32 = 0x40800000; 9 const SOC_DROM0_ADDRESS_LOW: u32 = 0x3f000000; 10 const SOC_DROM0_ADDRESS_HIGH: u32 = 0x3f400000; 11 const SOC_DRAM0_CACHE_ADDRESS_LOW: u32 = 0x3fc00000; 12 const SOC_DRAM0_CACHE_ADDRESS_HIGH: u32 = 0x3ff80000; 13 const SOC_DRAM1_ADDRESS_LOW: u32 = 0x3f800000; 14 const SOC_DRAM1_ADDRESS_HIGH: u32 = 0x3fc00000; 15 const SOC_DPORT_CACHE_ADDRESS_LOW: u32 = 0x3f500000; 16 const SOC_DPORT_CACHE_ADDRESS_HIGH: u32 = 0x3f800000; 17 const PRO_CACHE_IBUS0_MMU_START: u32 = 0; 18 const PRO_CACHE_IBUS1_MMU_START: u32 = 0x100; 19 const PRO_CACHE_IBUS2_MMU_START: u32 = 0x200; 20 const PRO_CACHE_DBUS0_MMU_START: u32 = 0x300; 21 const PRO_CACHE_DBUS1_MMU_START: u32 = 0x400; 22 const PRO_CACHE_DBUS2_MMU_START: u32 = 0x500; 23 24 pub fn mmu_ll_get_page_size(_mmu_id: u32) -> u32 { 25 crate::mmu_hal::MMU_PAGE_64KB 26 } 27 28 pub fn mmu_ll_get_entry_id(_mmu_id: u32, vaddr: u32) -> u32 { 29 let offset = if soc_address_in_bus!(SOC_DROM0, vaddr) { 30 PRO_CACHE_IBUS2_MMU_START / 4 31 } else if soc_address_in_bus!(SOC_IRAM0_CACHE, vaddr) { 32 PRO_CACHE_IBUS0_MMU_START / 4 33 } else if soc_address_in_bus!(SOC_IRAM1, vaddr) { 34 PRO_CACHE_IBUS1_MMU_START / 4 35 } else if soc_address_in_bus!(SOC_DPORT_CACHE, vaddr) { 36 PRO_CACHE_DBUS2_MMU_START / 4 37 } else if soc_address_in_bus!(SOC_DRAM1, vaddr) { 38 PRO_CACHE_DBUS1_MMU_START / 4 39 } else if soc_address_in_bus!(SOC_DRAM0_CACHE, vaddr) { 40 PRO_CACHE_DBUS0_MMU_START / 4 41 } else { 42 error!("mmu_ll_get_entry_id failed!"); 43 44 0 45 }; 46 47 offset + ((vaddr & SOC_MMU_VADDR_MASK) >> 16) 48 } 49 50 pub fn mmu_ll_entry_id_to_paddr_base(_mmu_id: u32, entry_id: u32) -> u32 { 51 let ptr = (DR_REG_MMU_TABLE + entry_id * 4) as *const u32; 52 unsafe { ((*ptr) & SOC_MMU_VALID_VAL_MASK) << 16 } 53 } 54 55 pub fn mmu_ll_check_entry_valid(_mmu_id: u32, entry_id: u32) -> bool { 56 let ptr = (DR_REG_MMU_TABLE + entry_id * 4) as *const u32; 57 unsafe { ((*ptr) & SOC_MMU_INVALID) == 0 } 58 }