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esp32s3.rs (739B)

      1 const SOC_MMU_VADDR_MASK: u32 = 0x1FFFFFF;
      2 const DR_REG_MMU_TABLE: u32 = 0x600C5000;
      3 const SOC_MMU_VALID_VAL_MASK: u32 = 0x3fff;
      4 const SOC_MMU_INVALID: u32 = 1 << 14;
      5 
      6 pub fn mmu_ll_get_page_size(_mmu_id: u32) -> u32 {
      7     crate::mmu_hal::MMU_PAGE_64KB
      8 }
      9 
     10 pub fn mmu_ll_get_entry_id(_mmu_id: u32, vaddr: u32) -> u32 {
     11     (vaddr & SOC_MMU_VADDR_MASK) >> 16
     12 }
     13 
     14 pub fn mmu_ll_entry_id_to_paddr_base(_mmu_id: u32, entry_id: u32) -> u32 {
     15     let ptr = (DR_REG_MMU_TABLE + entry_id * 4) as *const u32;
     16     unsafe { ((*ptr) & SOC_MMU_VALID_VAL_MASK) << 16 }
     17 }
     18 
     19 pub fn mmu_ll_check_entry_valid(_mmu_id: u32, entry_id: u32) -> bool {
     20     let ptr = (DR_REG_MMU_TABLE + entry_id * 4) as *const u32;
     21     unsafe { ((*ptr) & SOC_MMU_INVALID) == 0 }
     22 }