From a893c0dc4c0956f5b9b4db025bfc641362ad95a2 Mon Sep 17 00:00:00 2001 From: Raito Bezarius Date: Mon, 19 Feb 2024 01:19:46 +0100 Subject: [PATCH] devices/zyxel-nwa50ax: use our own more advanced DTB OpenWRT had a DTB for the NWA50AX LEDs that I didn't pick up. Anyway, we need to include our own special DTB for the NWA platform in general to support A/B operations, because OpenWRT original one just mark everything else read-only. Signed-off-by: Raito Bezarius --- devices/zyxel-nwa50ax/default.nix | 5 +- .../mt7621_zyxel_nwa-ax-for-ab.dtsi | 171 ++++++++++++++++++ .../zyxel-nwa50ax/mt7621_zyxel_nwa50ax.dtsi | 56 ++++++ 3 files changed, 231 insertions(+), 1 deletion(-) create mode 100644 devices/zyxel-nwa50ax/mt7621_zyxel_nwa-ax-for-ab.dtsi create mode 100644 devices/zyxel-nwa50ax/mt7621_zyxel_nwa50ax.dtsi diff --git a/devices/zyxel-nwa50ax/default.nix b/devices/zyxel-nwa50ax/default.nix index a5f7dff..468487b 100644 --- a/devices/zyxel-nwa50ax/default.nix +++ b/devices/zyxel-nwa50ax/default.nix @@ -147,8 +147,11 @@ rootDevice = "ubi:rootfs"; dts = { - src = "${openwrt.src}/target/linux/ramips/dts/mt7621_zyxel_nwa50ax.dts"; + # Actually, this is not what we want. + # This DTS is insufficient. + src = ./mt7621_zyxel_nwa50ax.dtsi; includes = [ + "${./.}" "${openwrt.src}/target/linux/ramips/dts" ]; }; diff --git a/devices/zyxel-nwa50ax/mt7621_zyxel_nwa-ax-for-ab.dtsi b/devices/zyxel-nwa50ax/mt7621_zyxel_nwa-ax-for-ab.dtsi new file mode 100644 index 0000000..250bc04 --- /dev/null +++ b/devices/zyxel-nwa50ax/mt7621_zyxel_nwa-ax-for-ab.dtsi @@ -0,0 +1,171 @@ +#include "mt7621.dtsi" + +#include +#include + +/ { + aliases { + label-mac-device = &gmac0; + }; +}; + +&nand { + status = "okay"; + + mediatek,nmbm; + mediatek,bmt-max-ratio = <15>; + mediatek,bmt-max-reserved-blocks = <64>; + mediatek,bmt-remap-range = + <0x0 0x980000>, + <0x2980000 0x7800000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "u-boot-env"; + reg = <0x80000 0x80000>; + read-only; + }; + + factory: partition@100000 { + label = "factory"; + reg = <0x100000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0xe00>; + }; + + precal_factory_e10: precal@e10 { + reg = <0xe10 0x19c10>; + }; + }; + }; + + partition@180000 { + label = "firmware_a"; + reg = <0x180000 0x2800000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel_a"; + reg = <0x0 0x800000>; + }; + + partition@400000 { + label = "ubi_a"; + reg = <0x800000 0x2000000>; + }; + }; + + partition@2980000 { + label = "firmware_b"; + reg = <0x2980000 0x2800000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel_b"; + reg = <0x0 0x800000>; + }; + + partition@400000 { + label = "ubi_b"; + reg = <0x800000 0x2000000>; + }; + }; + + partition@5180000 { + label = "rootfs_data"; + reg = <0x5180000 0x1400000>; + }; + + partition@6580000 { + label = "logs"; + reg = <0x6580000 0xd00000>; + }; + + partition@7280000 { + label = "vendor-myzyxel"; + reg = <0x7280000 0x480000>; + read-only; + }; + + partition@7700000 { + label = "bootconfig"; + reg = <0x7700000 0x80000>; + }; + + mrd: partition@7780000 { + label = "mrd"; + reg = <0x7780000 0x80000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mrd_1fff8: macaddr@1fff8 { + reg = <0x1fff8 0x6>; + }; + }; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie1 { + wlan_5g: wifi@0,0 { + reg = <0x0 0 0 0 0>; + compatible = "mediatek,mt76"; + + nvmem-cells = <&eeprom_factory_0>, <&precal_factory_e10>; + nvmem-cell-names = "eeprom", "precal"; + + /* MAC-Address set in userspace */ + }; +}; + +&gmac0 { + nvmem-cells = <&macaddr_mrd_1fff8>; + nvmem-cell-names = "mac-address"; +}; + +&switch0 { + ports { + port@4 { + status = "okay"; + label = "lan"; + }; + }; +}; + +&state_default { + gpio { + groups = "uart3"; + function = "gpio"; + }; +}; diff --git a/devices/zyxel-nwa50ax/mt7621_zyxel_nwa50ax.dtsi b/devices/zyxel-nwa50ax/mt7621_zyxel_nwa50ax.dtsi new file mode 100644 index 0000000..02b6ba4 --- /dev/null +++ b/devices/zyxel-nwa50ax/mt7621_zyxel_nwa50ax.dtsi @@ -0,0 +1,56 @@ +#include "mt7621_zyxel_nwa-ax-for-ab.dtsi" + +#include +#include + +/ { + compatible = "zyxel,nwa50ax", "mediatek,mt7621-soc"; + model = "ZyXEL NWA50AX"; + + aliases { + led-boot = &led_system_green; + led-failsafe = &led_system_red; + led-running = &led_system_green; + led-upgrade = &led_system_red; + }; + + leds { + compatible = "gpio-leds"; + + led_system_red: system_red { + label = "red:system"; + gpios = <&gpio 6 GPIO_ACTIVE_HIGH>; + }; + + led_system_green: system_green { + label = "green:system"; + gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; + }; + + system_blue { + label = "blue:system"; + gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio 30 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +ðernet { + pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>; +}; + +&state_default { + gpio { + groups = "uart3", "rgmii2"; + function = "gpio"; + }; +};