forked from dan/liminix
698 lines
23 KiB
Nix
698 lines
23 KiB
Nix
{
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description = ''
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OpenWrt One
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***********
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Hardware summary
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================
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- MediaTek MT7981B (1300MHz)
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- 256MB NAND Flash
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- 1024MB RAM
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- WLan hardware: Mediatek MT7976C
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Status
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======
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- Only tested over TFTP so far.
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- WiFi (2.4G and 5G) works.
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- 2.5G ethernet port works.
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Limitations
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===========
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- adding `he_bss_color="128"` causes `Invalid argument` for hostap
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- nvme support untested
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- I don't think the front LEDs work yet
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Installation
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============
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- build the default output (the FIT image)
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- rename it to 'openwrt-mediatek-filogic-openwrt_one-squashfs-sysupgrade.itb'
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- start a TFTP server
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- use 'Load production system via TFTP then write to NAND' and 'Boot production system from NAND'
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from the serial uboot menu
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'';
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system = {
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crossSystem = {
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config = "aarch64-unknown-linux-musl";
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gcc = {
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# https://openwrt.org/docs/techref/instructionset/aarch64_cortex-a53
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# openwrt ./target/linux/mediatek/filogic/target.mk
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# https://gcc.gnu.org/onlinedocs/gcc/AArch64-Options.html
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# https://en.wikipedia.org/wiki/Comparison_of_ARM_processors
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arch = "armv8-a";
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};
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};
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};
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module = {pkgs, config, lib, lim, ... }:
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let
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openwrt = pkgs.openwrt_24_10;
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mediatek-firmware = pkgs.stdenv.mkDerivation {
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name = "wlan-firmware";
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phases = ["installPhase"];
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installPhase = ''
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mkdir $out
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cp ${pkgs.linux-firmware}/lib/firmware/mediatek/{mt7915,mt7615,mt7986_eeprom_mt7976,mt7981}* $out
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'';
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};
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airoha-firmware = pkgs.stdenv.mkDerivation {
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name = "airoha-firmware";
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phases = ["installPhase"];
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installPhase = ''
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mkdir $out
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cp ${pkgs.linux-firmware}/lib/firmware/airoha/* $out
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'';
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};
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in {
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imports = [
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../../modules/arch/aarch64.nix
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../../modules/outputs/tftpboot.nix
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];
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config = {
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kernel = {
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src = openwrt.kernelSrc;
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version = openwrt.kernelVersion;
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extraPatchPhase = ''
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${openwrt.applyPatches.mediatek}
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'';
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config = {
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NET="y"; # unlock NET_XGRESS
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SERIAL_8250="y"; # unlock SERIAL_8250_FSL
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SERIAL_8250_CONSOLE="y"; # to get the serial console
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WATCHDOG="y"; # unlock WATCHDOG_CORE
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NEW_LEDS="y"; # unlock LEDS_PWM
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LEDS_CLASS="y"; # unlock LEDS_PWM
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LEDS_TRIGGERS="y"; # unlock LEDS_TRIGGER_PATTERN
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DEFERRED_STRUCT_PAGE_INIT="y"; # trigger PADATA
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# Taken from openwrt's ./target/linux/mediatek/filogic/config-6.6
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"64BIT"="y";
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AIROHA_EN8801SC_PHY="y";
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ARCH_BINFMT_ELF_EXTRA_PHDRS="y";
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ARCH_CORRECT_STACKTRACE_ON_KRETPROBE="y";
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ARCH_DEFAULT_KEXEC_IMAGE_VERIFY_SIG="y";
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ARCH_DMA_ADDR_T_64BIT="y";
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ARCH_FORCE_MAX_ORDER="10";
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ARCH_KEEP_MEMBLOCK="y";
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ARCH_MEDIATEK="y";
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ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE="y";
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ARCH_MMAP_RND_BITS="18";
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ARCH_MMAP_RND_BITS_MAX="24";
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ARCH_MMAP_RND_BITS_MIN="18";
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ARCH_MMAP_RND_COMPAT_BITS_MIN="11";
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ARCH_PROC_KCORE_TEXT="y";
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ARCH_SPARSEMEM_ENABLE="y";
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ARCH_STACKWALK="y";
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ARCH_SUSPEND_POSSIBLE="y";
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ARCH_WANTS_NO_INSTR="y";
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ARCH_WANTS_THP_SWAP="y";
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ARM64="y";
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ARM64_4K_PAGES="y";
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ARM64_ERRATUM_843419="y";
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ARM64_LD_HAS_FIX_ERRATUM_843419="y";
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ARM64_PAGE_SHIFT="12";
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ARM64_PA_BITS="48";
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ARM64_PA_BITS_48="y";
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ARM64_TAGGED_ADDR_ABI="y";
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ARM64_VA_BITS="39";
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ARM64_VA_BITS_39="y";
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ARM_AMBA="y";
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ARM_ARCH_TIMER="y";
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ARM_ARCH_TIMER_EVTSTREAM="y";
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ARM_GIC="y";
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ARM_GIC_V2M="y";
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ARM_GIC_V3="y";
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ARM_GIC_V3_ITS="y";
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ARM_GIC_V3_ITS_PCI="y";
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ARM_MEDIATEK_CPUFREQ="y";
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ARM_PMU="y";
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ARM_PMUV3="y";
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ARM_PSCI_FW="y";
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ATA="y";
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AUDIT_ARCH_COMPAT_GENERIC="y";
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BLK_DEV_LOOP="y";
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BLK_DEV_SD="y";
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BLK_MQ_PCI="y";
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BLK_PM="y";
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BLOCK_NOTIFIERS="y";
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BSD_PROCESS_ACCT="y";
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BSD_PROCESS_ACCT_V3="y";
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BUFFER_HEAD="y";
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BUILTIN_RETURN_ADDRESS_STRIPS_PAC="y";
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CC_HAVE_SHADOW_CALL_STACK="y";
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CC_HAVE_STACKPROTECTOR_SYSREG="y";
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#CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5";
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CC_NO_ARRAY_BOUNDS="y";
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CLKSRC_MMIO="y";
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CLONE_BACKWARDS="y";
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CMDLINE_OVERRIDE="y";
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COMMON_CLK="y";
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COMMON_CLK_MEDIATEK="y";
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COMMON_CLK_MT7981="y";
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COMMON_CLK_MT7981_ETHSYS="y";
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COMMON_CLK_MT7986="y";
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COMMON_CLK_MT7986_ETHSYS="y";
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COMMON_CLK_MT7988="y";
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COMPACT_UNEVICTABLE_DEFAULT="1";
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CONFIGFS_FS="y";
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CONSOLE_LOGLEVEL_DEFAULT="15";
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CONTEXT_TRACKING="y";
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CONTEXT_TRACKING_IDLE="y";
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CPU_FREQ="y";
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CPU_FREQ_DEFAULT_GOV_USERSPACE="y";
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CPU_FREQ_GOV_ATTR_SET="y";
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CPU_FREQ_GOV_COMMON="y";
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CPU_FREQ_GOV_CONSERVATIVE="y";
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CPU_FREQ_GOV_ONDEMAND="y";
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CPU_FREQ_GOV_PERFORMANCE="y";
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CPU_FREQ_GOV_POWERSAVE="y";
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CPU_FREQ_GOV_SCHEDUTIL="y";
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CPU_FREQ_GOV_USERSPACE="y";
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CPU_FREQ_STAT="y";
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CPU_LITTLE_ENDIAN="y";
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CPU_RMAP="y";
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CPU_THERMAL="y";
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CRC16="y";
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CRC_CCITT="y";
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CRYPTO_AES_ARM64="y";
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CRYPTO_AES_ARM64_CE="y";
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CRYPTO_AES_ARM64_CE_BLK="y";
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CRYPTO_AES_ARM64_CE_CCM="y";
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CRYPTO_CMAC="y";
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CRYPTO_CRC32="y";
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CRYPTO_CRC32C="y";
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CRYPTO_CRYPTD="y";
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CRYPTO_DEFLATE="y";
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CRYPTO_DRBG="y";
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CRYPTO_DRBG_HMAC="y";
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CRYPTO_DRBG_MENU="y";
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CRYPTO_ECB="y";
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CRYPTO_ECC="y";
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CRYPTO_ECDH="y";
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CRYPTO_GHASH_ARM64_CE="y";
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CRYPTO_HASH_INFO="y";
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CRYPTO_HMAC="y";
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CRYPTO_JITTERENTROPY="y";
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CRYPTO_LIB_BLAKE2S_GENERIC="y";
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CRYPTO_LIB_GF128MUL="y";
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CRYPTO_LIB_SHA1="y";
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CRYPTO_LIB_SHA256="y";
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CRYPTO_LIB_UTILS="y";
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CRYPTO_LZO="y";
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CRYPTO_RNG="y";
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CRYPTO_RNG2="y";
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CRYPTO_RNG_DEFAULT="y";
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CRYPTO_SHA256="y";
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CRYPTO_SHA256_ARM64="y";
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CRYPTO_SHA2_ARM64_CE="y";
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CRYPTO_SHA3="y";
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CRYPTO_SHA512="y";
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CRYPTO_SM4="y";
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CRYPTO_SM4_ARM64_CE_BLK="y";
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CRYPTO_SM4_ARM64_CE_CCM="y";
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CRYPTO_SM4_ARM64_CE_GCM="y";
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CRYPTO_ZSTD="y";
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DCACHE_WORD_ACCESS="y";
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#DEBUG_INFO="y";
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DEBUG_MISC="y";
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DIMLIB="y";
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DMADEVICES="y";
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DMATEST="y";
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DMA_BOUNCE_UNALIGNED_KMALLOC="y";
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DMA_DIRECT_REMAP="y";
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DMA_ENGINE="y";
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DMA_ENGINE_RAID="y";
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DMA_OF="y";
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DMA_VIRTUAL_CHANNELS="y";
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DTC="y";
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EDAC_SUPPORT="y";
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EINT_MTK="y";
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EXCLUSIVE_SYSTEM_RAM="y";
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EXT4_FS="y";
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F2FS_FS="y";
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FIXED_PHY="y";
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FIX_EARLYCON_MEM="y";
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FRAME_POINTER="y";
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FS_IOMAP="y";
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FS_MBCACHE="y";
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FUNCTION_ALIGNMENT="4";
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FUNCTION_ALIGNMENT_4B="y";
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FWNODE_MDIO="y";
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FW_LOADER_PAGED_BUF="y";
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#FW_LOADER_SYSFS="y";
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#GCC11_NO_ARRAY_BOUNDS="y";
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#GCC_ASM_GOTO_OUTPUT_WORKAROUND="y";
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GCC_SUPPORTS_DYNAMIC_FTRACE_WITH_ARGS="y";
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GENERIC_ALLOCATOR="y";
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GENERIC_ARCH_TOPOLOGY="y";
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GENERIC_BUG="y";
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GENERIC_BUG_RELATIVE_POINTERS="y";
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GENERIC_CLOCKEVENTS="y";
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GENERIC_CLOCKEVENTS_BROADCAST="y";
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GENERIC_CPU_AUTOPROBE="y";
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GENERIC_CPU_VULNERABILITIES="y";
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GENERIC_CSUM="y";
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GENERIC_EARLY_IOREMAP="y";
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GENERIC_GETTIMEOFDAY="y";
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GENERIC_IDLE_POLL_SETUP="y";
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GENERIC_IOREMAP="y";
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GENERIC_IRQ_EFFECTIVE_AFF_MASK="y";
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GENERIC_IRQ_SHOW="y";
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GENERIC_IRQ_SHOW_LEVEL="y";
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GENERIC_LIB_DEVMEM_IS_ALLOWED="y";
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GENERIC_MSI_IRQ="y";
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GENERIC_PCI_IOMAP="y";
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GENERIC_PHY="y";
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GENERIC_PINCONF="y";
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GENERIC_PINCTRL_GROUPS="y";
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GENERIC_PINMUX_FUNCTIONS="y";
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GENERIC_SCHED_CLOCK="y";
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GENERIC_SMP_IDLE_THREAD="y";
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GENERIC_STRNCPY_FROM_USER="y";
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GENERIC_STRNLEN_USER="y";
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GENERIC_TIME_VSYSCALL="y";
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GLOB="y";
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GPIO_CDEV="y";
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GPIO_WATCHDOG="y";
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GPIO_WATCHDOG_ARCH_INITCALL="y";
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GRO_CELLS="y";
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HARDIRQS_SW_RESEND="y";
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HAS_DMA="y";
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HAS_IOMEM="y";
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HAS_IOPORT="y";
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HAS_IOPORT_MAP="y";
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HWMON="y";
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HW_RANDOM="y";
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HW_RANDOM_MTK="y";
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I2C="y";
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I2C_BOARDINFO="y";
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I2C_CHARDEV="y";
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I2C_MT65XX="y";
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ICPLUS_PHY="y";
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ILLEGAL_POINTER_VALUE="0xdead000000000000";
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#INITRAMFS_SOURCE="""";
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IRQCHIP="y";
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IRQ_DOMAIN="y";
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IRQ_DOMAIN_HIERARCHY="y";
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IRQ_FORCED_THREADING="y";
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IRQ_TIME_ACCOUNTING="y";
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IRQ_WORK="y";
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JBD2="y";
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JUMP_LABEL="y";
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LEDS_PWM="y";
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LEDS_SMARTRG_LED="y";
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LIBFDT="y";
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LOCK_DEBUGGING_SUPPORT="y";
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LOCK_SPIN_ON_OWNER="y";
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LZO_COMPRESS="y";
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LZO_DECOMPRESS="y";
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MAGIC_SYSRQ="y";
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MAXLINEAR_GPHY="y";
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MDIO_BUS="y";
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MDIO_DEVICE="y";
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MDIO_DEVRES="y";
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MEDIATEK_2P5GE_PHY="y";
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MEDIATEK_GE_PHY="y";
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MEDIATEK_GE_SOC_PHY="y";
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MEDIATEK_WATCHDOG="y";
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MESSAGE_LOGLEVEL_DEFAULT="7";
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MFD_SYSCON="y";
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MIGRATION="y";
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MMC="y";
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MMC_BLOCK="y";
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MMC_CQHCI="y";
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MMC_MTK="y";
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MMU_LAZY_TLB_REFCOUNT="y";
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MODULES_TREE_LOOKUP="y";
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MODULES_USE_ELF_RELA="y";
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MTD_NAND_CORE="y";
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MTD_NAND_ECC="y";
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MTD_NAND_ECC_MEDIATEK="y";
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MTD_NAND_ECC_SW_HAMMING="y";
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MTD_NAND_MTK="y";
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MTD_NAND_MTK_BMT="y";
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MTD_PARSER_TRX="y";
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MTD_RAW_NAND="y";
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MTD_SPI_NAND="y";
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MTD_SPI_NOR="y";
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MTD_SPLIT_FIRMWARE="y";
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MTD_SPLIT_FIT_FW="y";
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MTD_UBI="y";
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MTD_UBI_BEB_LIMIT="20";
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MTD_UBI_BLOCK="y";
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MTD_UBI_FASTMAP="y";
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MTD_UBI_NVMEM="y";
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MTD_UBI_WL_THRESHOLD="4096";
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MTK_CPUX_TIMER="y";
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MTK_HSDMA="y";
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MTK_INFRACFG="y";
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MTK_LVTS_THERMAL="y";
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MTK_LVTS_THERMAL_DEBUGFS="y";
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MTK_PMIC_WRAP="y";
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MTK_REGULATOR_COUPLER="y";
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MTK_SCPSYS="y";
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MTK_SCPSYS_PM_DOMAINS="y";
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MTK_SOC_THERMAL="y";
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MTK_THERMAL="y";
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MTK_TIMER="y";
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MUTEX_SPIN_ON_OWNER="y";
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NEED_DMA_MAP_STATE="y";
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NEED_SG_DMA_LENGTH="y";
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NET_DEVLINK="y";
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NET_DSA="y";
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NET_DSA_MT7530="y";
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NET_DSA_MT7530_MDIO="y";
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NET_DSA_MT7530_MMIO="y";
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NET_DSA_TAG_MTK="y";
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#NET_EGRESS="y";
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NET_FLOW_LIMIT="y";
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#NET_INGRESS="y";
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NET_MEDIATEK_SOC="y";
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NET_MEDIATEK_SOC_WED="y";
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NET_SELFTESTS="y";
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NET_SWITCHDEV="y";
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NET_VENDOR_MEDIATEK="y";
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#NET_XGRESS="y";
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NLS="y";
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NO_HZ_COMMON="y";
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NO_HZ_IDLE="y";
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NR_CPUS="4";
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NVMEM="y";
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NVMEM_BLOCK="y";
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NVMEM_LAYOUTS="y";
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NVMEM_LAYOUT_ADTRAN="y";
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NVMEM_MTK_EFUSE="y";
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NVMEM_SYSFS="y";
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OF="y";
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OF_ADDRESS="y";
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OF_DYNAMIC="y";
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OF_EARLY_FLATTREE="y";
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OF_FLATTREE="y";
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OF_GPIO="y";
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OF_IRQ="y";
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OF_KOBJ="y";
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OF_MDIO="y";
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OF_OVERLAY="y";
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OF_RESOLVE="y";
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PADATA="y";
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PAGE_POOL="y";
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PAGE_POOL_STATS="y";
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PAGE_SIZE_LESS_THAN_256KB="y";
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PAGE_SIZE_LESS_THAN_64KB="y";
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#PAHOLE_HAS_LANG_EXCLUDE="y";
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PARTITION_PERCPU="y";
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PCI="y";
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PCIEAER="y";
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PCIEASPM="y";
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PCIEASPM_PERFORMANCE="y";
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PCIEPORTBUS="y";
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PCIE_MEDIATEK_GEN3="y";
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PCIE_PME="y";
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PCI_DEBUG="y";
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PCI_DOMAINS="y";
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PCI_DOMAINS_GENERIC="y";
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PCI_MSI="y";
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PCS_MTK_LYNXI="y";
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PCS_MTK_USXGMII="y";
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PERF_EVENTS="y";
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PER_VMA_LOCK="y";
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PGTABLE_LEVELS="3";
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PHYLIB="y";
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PHYLIB_LEDS="y";
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PHYLINK="y";
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PHYS_ADDR_T_64BIT="y";
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PHY_MTK_TPHY="y";
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PHY_MTK_XFI_TPHY="y";
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PHY_MTK_XSPHY="y";
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PINCTRL="y";
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PINCTRL_MT7981="y";
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PINCTRL_MT7986="y";
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PINCTRL_MT7988="y";
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PINCTRL_MTK_MOORE="y";
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PINCTRL_MTK_V2="y";
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PM="y";
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PM_CLK="y";
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PM_GENERIC_DOMAINS="y";
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PM_GENERIC_DOMAINS_OF="y";
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PM_OPP="y";
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POLYNOMIAL="y";
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POSIX_CPU_TIMERS_TASK_WORK="y";
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POWER_RESET="y";
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POWER_RESET_SYSCON="y";
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POWER_SUPPLY="y";
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PREEMPT_NONE_BUILD="y";
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PRINTK_TIME="y";
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PSTORE="y";
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PSTORE_COMPRESS="y";
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PSTORE_CONSOLE="y";
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PSTORE_PMSG="y";
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PSTORE_RAM="y";
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PTP_1588_CLOCK_OPTIONAL="y";
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PWM="y";
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PWM_MEDIATEK="y";
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PWM_SYSFS="y";
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QUEUED_RWLOCKS="y";
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|
QUEUED_SPINLOCKS="y";
|
|
RANDSTRUCT_NONE="y";
|
|
RAS="y";
|
|
RATIONAL="y";
|
|
REALTEK_PHY="y";
|
|
REED_SOLOMON="y";
|
|
REED_SOLOMON_DEC8="y";
|
|
REED_SOLOMON_ENC8="y";
|
|
REGMAP="y";
|
|
REGMAP_I2C="y";
|
|
REGMAP_MMIO="y";
|
|
REGULATOR="y";
|
|
REGULATOR_FIXED_VOLTAGE="y";
|
|
REGULATOR_MT6380="y";
|
|
REGULATOR_RT5190A="y";
|
|
RESET_CONTROLLER="y";
|
|
RESET_TI_SYSCON="y";
|
|
RFS_ACCEL="y";
|
|
RODATA_FULL_DEFAULT_ENABLED="y";
|
|
RPS="y";
|
|
RTC_CLASS="y";
|
|
RTC_DRV_MT7622="y";
|
|
RTC_I2C_AND_SPI="y";
|
|
RWSEM_SPIN_ON_OWNER="y";
|
|
SCHED_MC="y";
|
|
SCSI="y";
|
|
SCSI_COMMON="y";
|
|
SERIAL_8250_FSL="y";
|
|
SERIAL_8250_MT6577="y";
|
|
SERIAL_8250_NR_UARTS="3";
|
|
SERIAL_8250_RUNTIME_UARTS="3";
|
|
SERIAL_DEV_BUS="y";
|
|
SERIAL_DEV_CTRL_TTYPORT="y";
|
|
SERIAL_MCTRL_GPIO="y";
|
|
SERIAL_OF_PLATFORM="y";
|
|
SGL_ALLOC="y";
|
|
SG_POOL="y";
|
|
SMP="y";
|
|
SOCK_RX_QUEUE_MAPPING="y";
|
|
SOFTIRQ_ON_OWN_STACK="y";
|
|
SPARSEMEM="y";
|
|
SPARSEMEM_EXTREME="y";
|
|
SPARSEMEM_VMEMMAP="y";
|
|
SPARSEMEM_VMEMMAP_ENABLE="y";
|
|
SPARSE_IRQ="y";
|
|
SPI="y";
|
|
SPI_DYNAMIC="y";
|
|
SPI_MASTER="y";
|
|
SPI_MEM="y";
|
|
SPI_MT65XX="y";
|
|
SPI_MTK_SNFI="y";
|
|
#SQUASHFS_DECOMP_MULTI_PERCPU="y";
|
|
SWIOTLB="y";
|
|
SWPHY="y";
|
|
SYSCTL_EXCEPTION_TRACE="y";
|
|
THERMAL="y";
|
|
THERMAL_DEFAULT_GOV_STEP_WISE="y";
|
|
THERMAL_EMERGENCY_POWEROFF_DELAY_MS="0";
|
|
THERMAL_GOV_BANG_BANG="y";
|
|
THERMAL_GOV_FAIR_SHARE="y";
|
|
THERMAL_GOV_STEP_WISE="y";
|
|
THERMAL_GOV_USER_SPACE="y";
|
|
THERMAL_HWMON="y";
|
|
THERMAL_OF="y";
|
|
THERMAL_WRITABLE_TRIPS="y";
|
|
THREAD_INFO_IN_TASK="y";
|
|
TICK_CPU_ACCOUNTING="y";
|
|
TIMER_OF="y";
|
|
TIMER_PROBE="y";
|
|
TRACE_IRQFLAGS_NMI_SUPPORT="y";
|
|
TREE_RCU="y";
|
|
TREE_SRCU="y";
|
|
UBIFS_FS="y";
|
|
UIMAGE_FIT_BLK="y";
|
|
USB_SUPPORT="y";
|
|
VMAP_STACK="y";
|
|
WATCHDOG_CORE="y";
|
|
WATCHDOG_PRETIMEOUT_DEFAULT_GOV_PANIC="y";
|
|
WATCHDOG_PRETIMEOUT_GOV="y";
|
|
WATCHDOG_PRETIMEOUT_GOV_PANIC="y";
|
|
WATCHDOG_PRETIMEOUT_GOV_SEL="m";
|
|
WATCHDOG_SYSFS="y";
|
|
XPS="y";
|
|
XXHASH="y";
|
|
ZLIB_DEFLATE="y";
|
|
ZLIB_INFLATE="y";
|
|
ZONE_DMA32="y";
|
|
ZSTD_COMMON="y";
|
|
ZSTD_COMPRESS="y";
|
|
ZSTD_DECOMPRESS="y";
|
|
# from DEVICE_PACKAGES in the openwrt_one section of
|
|
# openwrt's ./target/linux/mediatek/image/filogic.mk:
|
|
# chop off the 'kmod-' prefix and search for 'KernelPackage/...'
|
|
# in ./package/kernel/linux/modules/*.mk, and remember to add
|
|
# modules to kmodloader targets below
|
|
AIR_EN8811H_PHY="m";
|
|
RTC_DRV_PCF8563="m";
|
|
NVME_CORE="m";
|
|
BLK_DEV_NVME="m";
|
|
NVME_MULTIPATH="n";
|
|
NVME_HWMON="y";
|
|
# ???
|
|
AQUANTIA_PHY="m";
|
|
MT798X_WMAC="y";
|
|
} // lib.optionalAttrs (config.system.service ? watchdog) {
|
|
RALINK_WDT = "y"; # watchdog
|
|
MT7621_WDT = "y"; # or it might be this one
|
|
};
|
|
conditionalConfig = {
|
|
WLAN = {
|
|
MT7915E = "m";
|
|
};
|
|
};
|
|
};
|
|
boot = {
|
|
commandLine = [ "console=ttyS0,115200" ];
|
|
tftp = {
|
|
# Should be a segment of free RAM, where the tftp artifact
|
|
# can be stored before unpacking it to the 'hardware.loadAddress'
|
|
# The 'hardware.loadAddress' is 0x44000000, and the bootlog
|
|
# suggests it loads the fit to 0x46000000
|
|
loadAddress = lim.parseInt "0x46000000";
|
|
};
|
|
imageFormat = "fit";
|
|
};
|
|
filesystem =
|
|
let inherit (pkgs.pseudofile) dir symlink;
|
|
in
|
|
dir {
|
|
lib = dir {
|
|
firmware = dir {
|
|
mediatek = symlink mediatek-firmware;
|
|
airoha = symlink airoha-firmware;
|
|
};
|
|
};
|
|
};
|
|
|
|
hardware =
|
|
let
|
|
phy = pkgs.kmodloader.override {
|
|
targets = [
|
|
"air_en8811h"
|
|
];
|
|
inherit (config.system.outputs) kernel;
|
|
};
|
|
mac80211 = pkgs.kmodloader.override {
|
|
targets = [
|
|
"mt7915e"
|
|
"rtc-pcf8563"
|
|
"nvme_core"
|
|
"nvme"
|
|
#"mt7996e"
|
|
"aquantia"
|
|
];
|
|
inherit (config.system.outputs) kernel;
|
|
};
|
|
in {
|
|
# from OEM bootlog
|
|
# Creating 4 MTD partitions on "spi0.0":
|
|
# 0x000000000000-0x000000040000 : "bl2-nor"
|
|
# 0x000000040000-0x000000100000 : "factory"
|
|
# 0x000000100000-0x000000180000 : "fip-nor"
|
|
# 0x000000180000-0x000000e00000 : "recovery"
|
|
# spi-nand spi1.1: calibration result: 0x3
|
|
# spi-nand spi1.1: Winbond SPI NAND was found.
|
|
# spi-nand spi1.1: 256 MiB, block size: 128 KiB, page size: 2048, OOB size: 128
|
|
# 2 fixed-partitions partitions found on MTD device spi1.1
|
|
# Creating 2 MTD partitions on "spi1.1":
|
|
# 0x000000000000-0x000000100000 : "bl2"
|
|
# 0x000000100000-0x000010000000 : "ubi"
|
|
|
|
flash = {
|
|
# from the OEM bootlog:
|
|
# ## Checking Image at 46000000 ...
|
|
# FIT image found
|
|
# FIT description: ARM64 OpenWrt FIT (Flattened Image Tree)
|
|
# Image 0 (kernel-1)
|
|
# Description: ARM64 OpenWrt Linux-6.6.57
|
|
# Type: Kernel Image
|
|
# Compression: gzip compressed
|
|
# Data Start: 0x46001000
|
|
# Data Size: 5751840 Bytes = 5.5 MiB
|
|
# Architecture: AArch64
|
|
# OS: Linux
|
|
# Load Address: 0x44000000
|
|
# Entry Point: 0x44000000
|
|
|
|
address = lim.parseInt "0x44000000";
|
|
size = lim.parseInt "0xf60000";
|
|
# /proc/mtd on a running system:
|
|
# dev: size erasesize name
|
|
# mtd0: 00040000 00010000 "bl2-nor"
|
|
# mtd1: 000c0000 00010000 "factory"
|
|
# mtd2: 00080000 00010000 "fip-nor"
|
|
# mtd3: 00c80000 00010000 "recovery"
|
|
# mtd4: 00100000 00020000 "bl2"
|
|
# mtd5: 0ff00000 00020000 "ubi"
|
|
eraseBlockSize = 65536;
|
|
};
|
|
|
|
defaultOutput = "uimage";
|
|
loadAddress = lim.parseInt "0x44000000";
|
|
entryPoint = lim.parseInt "0x44000000";
|
|
# TODO AFAICT this should be 2048, but I got 'FIT: image rootfs-1 start not aligned to page boundaries' with that...
|
|
#alignment = 2048;
|
|
alignment = 4096;
|
|
rootDevice = "/dev/fit0";
|
|
dts = {
|
|
src = "${openwrt.src}/target/linux/mediatek/dts/mt7981b-openwrt-one.dts";
|
|
includePaths = [
|
|
"${openwrt.src}/target/linux/mediatek/dts"
|
|
"${config.system.outputs.kernel.modulesupport}/arch/arm64/boot/dts/mediatek/"
|
|
];
|
|
};
|
|
|
|
networkInterfaces =
|
|
let
|
|
inherit (config.system.service.network) link;
|
|
in rec {
|
|
eth0 = link.build {
|
|
ifname = "eth0";
|
|
dependencies = [ phy ];
|
|
};
|
|
eth1 = link.build { ifname = "eth1"; };
|
|
|
|
wlan0 = link.build {
|
|
ifname = "wlan0";
|
|
dependencies = [ mac80211 ];
|
|
};
|
|
wlan1 = link.build {
|
|
ifname = "wlan1";
|
|
dependencies = [ mac80211 ];
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
}
|